instruction.h

/***************************************************************************
 *   Copyright (C) 2004-2005 by Daniel Clarke <daniel.jc@gmail.com>        *
 *                      2005 by David Saxton <david@bluehaze.org>          *
 *                                                                         *
 *   This program is free software; you can redistribute it and/or modify  *
 *   it under the terms of the GNU General Public License as published by  *
 *   the Free Software Foundation; either version 2 of the License, or     *
 *   (at your option) any later version.                                   *
 *                                                                         *
 *   This program is distributed in the hope that it will be useful,       *
 *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
 *   GNU General Public License for more details.                          *
 *                                                                         *
 *   You should have received a copy of the GNU General Public License     *
 *   along with this program; if not, write to the                         *
 *   Free Software Foundation, Inc.,                                       *
 *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
 ***************************************************************************/

#ifndef INSTRUCTION_H
#define INSTRUCTION_H

#include <qmap.h>
#include <qstring.h>
#include <qstringlist.h>
#include <qvaluelist.h>

class Code;
class CodeIterator;
class CodeConstIterator;
class Instruction;
class PIC14;

typedef QValueList<Instruction*> InstructionList;


class Register
{
        public:
                enum Type
                {
                        TMR0,
                        OPTION_REG,
                        PCL,
                        STATUS,
                        FSR,
                        PORTA,
                        TRISA,
                        PORTB,
                        TRISB,
                        EEDATA,
                        EECON1,
                        EEADR,
                        EECON2,
                        PCLATH,
                        INTCON,
                        
                        // The following three are "special"
                        WORKING, // Not a register that is addressable by an address
                        GPR, // Refers to the collection of General Purpose Registers
                        none, // used in default constructor
                };
                
                // These banks are used for ORing together in the banks() function
                enum Banks
                {
                        Bank0 = 1 << 0,
                        Bank1 = 1 << 1,
                };
                
                Register( Type type = none );
                Register( const QString & name );
                Register( const char * name );
                bool operator < ( const Register & reg ) const;
                bool operator == ( const Register & reg ) const;
                uchar banks() const;
                bool bankDependent() const;
                QString name() const { return m_name; }
                Type type() const { return m_type; }
                bool affectsExternal() const;
                
        protected:
                QString m_name;
                Type m_type;
};



class RegisterBit
{
        public:
                enum STATUS_bits
                {
                        C                       = 0, // Carry
                        DC                      = 1, // Digit carry
                        Z                       = 2, // Zero
                        NOT_PD          = 3, // Power-down
                        NOT_TO          = 4, // Time-out
                        RP0                     = 5, // Bank Select
                        RP1                     = 6,
                        IRP                     = 7,
                };
                
                enum INTCON_bits
                {
                        RBIF            = 0,
                        INTF            = 1,
                        T0IF            = 2,
                        RBIE            = 3,
                        INTE            = 4,
                        T0IE            = 5,
                        EEIE            = 6,
                        GIE                     = 7,
                };
                
                enum OPTION_bits
                {
                        PS0                     = 0,
                        PS1                     = 1,
                        PS2                     = 2,
                        PSA                     = 3,
                        T0SE            = 4,
                        T0CS            = 5,
                        INTEDG          = 6,
                        NOT_RBPU        = 7,
                };
                
                enum EECON1_bits
                {
                        RD                      = 0,
                        WR                      = 1,
                        WREN            = 2,
                        WRERR           = 3,
                        EEIF            = 4,
                };
                RegisterBit( uchar bitPos = 0, Register::Type reg = Register::none );
                RegisterBit( const QString & name );
                RegisterBit( const char * name );
                Register::Type registerType() const { return m_registerType; }
                uchar bitPos() const { return m_bitPos; }
                uchar bit() const { return (1 << m_bitPos); }
                QString name() const { return m_name; }
                
                
        protected:
                void initFromName();
                
                Register::Type m_registerType;
                uchar m_bitPos:3;
                QString m_name;
};




class RegisterState
{
        public:
                RegisterState();
                
                void merge( const RegisterState & state );
                void reset();
                uchar definiteZeros() const { return (~value) & known; }
                uchar definiteOnes() const { return value & known; }
                uchar unknown() const { return ~known; }
                uchar maxValue() const { return (value & known) | (~known); }
                uchar minValue() const { return (value & known); }
                bool operator == ( const RegisterState & state ) const;
                bool operator != ( const RegisterState & state ) const { return !( *this == state ); }
                void print();
                
                uchar known;
                
                uchar value;
};


class RegisterBehaviour
{
        public:
                RegisterBehaviour();
                void reset();
                
                uchar depends;
                
                uchar indep;
};



class ProcessorState
{
        public:
                ProcessorState();
                void merge( const ProcessorState & state );
                void reset();
                RegisterState & reg( const Register & reg );
                RegisterState reg( const Register & reg ) const;
                bool operator == ( const ProcessorState & state ) const;
                bool operator != ( const ProcessorState & state ) const { return !( *this == state ); }
                void print();
                
                RegisterState working;
                
                RegisterState status;
                
        protected:
                typedef QMap< Register, RegisterState > RegisterMap;
                RegisterMap m_registers;
};


class ProcessorBehaviour
{
        public:
                ProcessorBehaviour();
                void reset();
                RegisterBehaviour & reg( const Register & reg );
                
                RegisterBehaviour working;
                
                RegisterBehaviour status;
                
        protected:
                typedef QMap< Register, RegisterBehaviour > RegisterMap;
                RegisterMap m_registers;
};


class RegisterDepends
{
        public:
                RegisterDepends();
                void reset();
                uchar & reg( const Register & reg );
                
                uchar working;
                
                uchar status;
                
        protected:
                typedef QMap< Register, uchar > RegisterMap;
                RegisterMap m_registers;
};



class Code
{
        public:
                Code();
                
                typedef CodeIterator iterator;
                typedef CodeConstIterator const_iterator;
                
                enum InstructionPosition
                {
                        InterruptHandler        = 0,
                        LookupTable                     = 1,
                        Middle                          = 2, 
                        Subroutine                      = 3, 
                        
                        PositionCount           = 4, 
                };
                
                CodeIterator begin();
                CodeIterator end();
                CodeConstIterator begin() const;
                CodeConstIterator end() const;
                
                void queueLabel( const QString & label, InstructionPosition position = Middle );
                QStringList queuedLabels( InstructionPosition position ) const { return m_queuedLabels[position]; }
                void append( Instruction * instruction, InstructionPosition position = Middle );
                Instruction * instruction( const QString & label ) const;
                iterator find( Instruction * instruction );
                void removeInstruction( Instruction * instruction );
                QString generateCode( PIC14 * pic ) const;
                void merge( Code * code, InstructionPosition middleInsertionPosition = Middle );
                InstructionList * instructionList( InstructionPosition position ) { return & m_instructionLists[position]; }
                const InstructionList * instructionList( InstructionPosition position ) const { return & m_instructionLists[position]; }
                void generateLinksAndStates();
                void setAllUnused();
                void postCompileConstruct();
                
        protected:
                QStringList findVariables() const;
                
                InstructionList m_instructionLists[ PositionCount ]; 
                QStringList m_queuedLabels[ PositionCount ]; 
                
        private: // Disable copy constructor and operator=
                Code( const Code & );
                Code &operator=( const Code & );
};


class CodeIterator
{
        public:
                bool operator != ( const CodeIterator & i ) const { return it != i.it; }
                bool operator == ( const CodeIterator & i ) const { return it == i.it; }
                CodeIterator & operator ++ ();
                Instruction * & operator * () { return *it; }
                CodeIterator & removeAndIncrement();
                void insertBefore( Instruction * ins );
                
                InstructionList::iterator it;
                InstructionList::iterator listEnd;
                Code::InstructionPosition pos;
                Code * code;
                InstructionList * list;
};


class CodeConstIterator
{
        public:
                bool operator != ( const CodeConstIterator & i ) const { return it != i.it; }
                bool operator == ( const CodeConstIterator & i ) const { return it == i.it; }
                CodeConstIterator & operator ++ ();
                const Instruction * operator * () const { return *it; }
                
                InstructionList::const_iterator it;
                InstructionList::const_iterator listEnd;
                Code::InstructionPosition pos;
                const Code * code;
                const InstructionList * list;
};


class Instruction
{
        public:
                enum InstructionType
                {
                        Assembly,
                        Raw, // User-inserted assembly
                        Comment,
                };
                enum AssemblyType
                {
                        FileOriented,
                        
                        BitOriented,
                        
                        WorkingOriented,
                        
                        Other,
                        
                        None,
                };

                Instruction();
                virtual ~Instruction();
                void setCode( Code * code ) { m_pCode = code; }
                
                virtual InstructionType type() const { return Assembly; }
                virtual AssemblyType assemblyType() const = 0;
                virtual QString code() const = 0;
                void setInputState( const ProcessorState & processorState ) { m_inputState = processorState; }
                virtual void generateLinksAndStates( Code::iterator instruction );
                virtual ProcessorBehaviour behaviour() const;
                void addInputLink( Instruction * inputLink );
                void addOutputLink( Instruction * inputLink );
                InstructionList inputLinks() const { return m_inputLinks; }
                InstructionList outputLinks() const { return m_outputLinks; }
                void removeInputLink( Instruction * ins );
                void removeOutputLink( Instruction * ins );
                void clearLinks();
                QStringList labels() const { return m_labels; }
                void addLabels( const QStringList & labels );
                void setLabels( const QStringList & labels );
                void setUsed( bool used ) { m_bUsed = used; }
                bool isUsed() const { return m_bUsed; }
                void setRegisterDepends( uchar depends, const Register & reg ) { m_registerDepends.reg(reg) = depends; }
                uchar registerDepends( const Register & reg ) { return m_registerDepends.reg(reg); }
                void resetRegisterDepends() { m_registerDepends.reset(); }
                ProcessorState inputState() const { return m_inputState; }
                ProcessorState outputState() const { return m_outputState; }
                Register file() const { return m_file; }
                RegisterBit bit() const { return m_bit; }
                uchar literal() const { return m_literal; }
                Register outputReg() const { return (m_dest == 0) ? Register::WORKING : m_file; }
                unsigned dest() const { return m_dest; }
                
        protected:
                void makeOutputLinks( Code::iterator current, bool firstOutput = true, bool secondOutput = false );
                void makeLabelOutputLink( const QString & label );
                
                RegisterDepends m_registerDepends;
                bool m_bInputStateChanged;
                bool m_bUsed;
                bool m_bPositionAffectsBranching;
                InstructionList m_inputLinks;
                InstructionList m_outputLinks;
                QStringList m_labels;
                Code * m_pCode;
                
                // Commonly needed member variables for assembly instructions
                Register m_file;
                RegisterBit m_bit;
                QString m_raw; // Used by source code, raw asm, etc
                uchar m_literal;
                unsigned m_dest:1; // is 0 (W) or 1 (file).
                ProcessorState m_inputState;
                ProcessorState m_outputState;
                
        private: // Disable copy constructor and operator=
                Instruction( const Instruction & );
                Instruction &operator=( const Instruction & );
};



//BEGIN Byte-Oriented File Register Operations
class Instr_addwf : public Instruction
{
        public:
                Instr_addwf( const Register & file, int dest ) { m_file = file; m_dest = dest; }
                virtual QString code() const;
                virtual void generateLinksAndStates( Code::iterator current );
                virtual ProcessorBehaviour behaviour() const;
                virtual AssemblyType assemblyType() const { return FileOriented; }
};


class Instr_andwf : public Instruction
{
        public:
                Instr_andwf( const Register & file, int dest ) { m_file = file; m_dest = dest; }
                virtual QString code() const;
                virtual void generateLinksAndStates( Code::iterator current );
                virtual ProcessorBehaviour behaviour() const;
                virtual AssemblyType assemblyType() const { return FileOriented; }
};


class Instr_clrf : public Instruction
{
        public:
                Instr_clrf( const Register & file ) { m_file = file; m_dest = 1; }
                virtual QString code() const;
                virtual void generateLinksAndStates( Code::iterator current );
                virtual ProcessorBehaviour behaviour() const;
                virtual AssemblyType assemblyType() const { return FileOriented; }
};


//TODO CLRW
//TODO COMF


class Instr_decf : public Instruction
{
        public:
                Instr_decf( const Register & file, int dest ) { m_file = file; m_dest = dest; }
                virtual QString code() const;
                virtual void generateLinksAndStates( Code::iterator current );
                virtual ProcessorBehaviour behaviour() const;
                virtual AssemblyType assemblyType() const { return FileOriented; }
};


class Instr_decfsz : public Instruction
{
        public:
                Instr_decfsz( const Register & file, int dest ) { m_file = file; m_dest = dest; }
                virtual QString code() const;
                virtual void generateLinksAndStates( Code::iterator current );
                virtual ProcessorBehaviour behaviour() const;
                virtual AssemblyType assemblyType() const { return FileOriented; }
};


class Instr_incf : public Instruction
{
        public:
                Instr_incf( const Register & file, int dest ) { m_file = file; m_dest = dest; }
                virtual QString code() const;
                virtual void generateLinksAndStates( Code::iterator current );
                virtual ProcessorBehaviour behaviour() const;
                virtual AssemblyType assemblyType() const { return FileOriented; }
};


//TODO INCFSZ


class Instr_iorwf : public Instruction
{
        public:
                Instr_iorwf( const Register & file, int dest ) { m_file = file; m_dest = dest; }
                virtual QString code() const;
                virtual void generateLinksAndStates( Code::iterator current );
                virtual ProcessorBehaviour behaviour() const;
                virtual AssemblyType assemblyType() const { return FileOriented; }
};


class Instr_movf : public Instruction
{
        public:
                Instr_movf( const Register & file, int dest ) { m_file = file; m_dest = dest; }
                virtual QString code() const;
                virtual void generateLinksAndStates( Code::iterator current );
                virtual ProcessorBehaviour behaviour() const;
                virtual AssemblyType assemblyType() const { return FileOriented; }
};


class Instr_movwf : public Instruction
{
        public:
                Instr_movwf( const Register & file ) { m_file = file; m_dest = 1; }
                virtual QString code() const;
                virtual void generateLinksAndStates( Code::iterator current );
                virtual ProcessorBehaviour behaviour() const;
                virtual AssemblyType assemblyType() const { return FileOriented; }
};


//TODO NOP


class Instr_rlf : public Instruction
{
        public:
                Instr_rlf( const Register & file, int dest ) { m_file = file; m_dest = dest; }
                virtual QString code() const;
                virtual void generateLinksAndStates( Code::iterator current );
                virtual ProcessorBehaviour behaviour() const;
                virtual AssemblyType assemblyType() const { return FileOriented; }
};


class Instr_rrf : public Instruction
{
        public:
                Instr_rrf( const Register & file, int dest ) { m_file = file; m_dest = dest; }
                virtual QString code() const;
                virtual void generateLinksAndStates( Code::iterator current );
                virtual ProcessorBehaviour behaviour() const;
                virtual AssemblyType assemblyType() const { return FileOriented; }
};


class Instr_subwf : public Instruction
{
        public:
                Instr_subwf( const Register & file, int dest ) { m_file = file; m_dest = dest; }
                virtual QString code() const;
                virtual void generateLinksAndStates( Code::iterator current );
                virtual ProcessorBehaviour behaviour() const;
                virtual AssemblyType assemblyType() const { return FileOriented; }
};


class Instr_swapf : public Instruction
{
        public:
                Instr_swapf( const Register & file, int dest ) { m_file = file; m_dest = dest; }
                virtual QString code() const;
                virtual void generateLinksAndStates( Code::iterator current );
                virtual ProcessorBehaviour behaviour() const;
                virtual AssemblyType assemblyType() const { return FileOriented; }
};


class Instr_xorwf : public Instruction
{
        public:
                Instr_xorwf( const Register & file, int dest ) { m_file = file; m_dest = dest; }
                virtual QString code() const;
                virtual void generateLinksAndStates( Code::iterator current );
                virtual ProcessorBehaviour behaviour() const;
                virtual AssemblyType assemblyType() const { return FileOriented; }
};
//END Byte-Oriented File Register Operations



//BEGIN Bit-Oriented File Register Operations
class Instr_bcf : public Instruction
{
        public:
                Instr_bcf( const Register & file, const RegisterBit & bit ) { m_file = file; m_bit = bit; }
                virtual QString code() const;
                virtual void generateLinksAndStates( Code::iterator current );
                virtual ProcessorBehaviour behaviour() const;
                virtual AssemblyType assemblyType() const { return BitOriented; }
};


class Instr_bsf : public Instruction
{
        public:
                Instr_bsf( const Register & file, const RegisterBit & bit ) { m_file = file; m_bit = bit; }
                virtual QString code() const;
                virtual void generateLinksAndStates( Code::iterator current );
                virtual ProcessorBehaviour behaviour() const;
                virtual AssemblyType assemblyType() const { return BitOriented; }
};


class Instr_btfsc : public Instruction
{
        public:
                Instr_btfsc( const Register & file, const RegisterBit & bit ) { m_file = file; m_bit = bit; }
                virtual QString code() const;
                virtual void generateLinksAndStates( Code::iterator current );
                virtual ProcessorBehaviour behaviour() const;
                virtual AssemblyType assemblyType() const { return Other; }
};


class Instr_btfss : public Instruction
{
        public:
                Instr_btfss( const Register & file, const RegisterBit & bit ) { m_file = file; m_bit = bit; }
                virtual QString code() const;
                virtual void generateLinksAndStates( Code::iterator current );
                virtual ProcessorBehaviour behaviour() const;
                virtual AssemblyType assemblyType() const { return Other; }
};
//END Bit-Oriented File Register Operations



//BEGIN Literal and Control Operations
class Instr_addlw : public Instruction
{
        public:
                Instr_addlw( int literal ) { m_literal = literal; }
                virtual QString code() const;
                virtual void generateLinksAndStates( Code::iterator current );
                virtual ProcessorBehaviour behaviour() const;
                virtual AssemblyType assemblyType() const { return WorkingOriented; }
};



class Instr_andlw : public Instruction
{
        public:
                Instr_andlw( int literal ) { m_literal = literal; }
                virtual QString code() const;
                virtual void generateLinksAndStates( Code::iterator current );
                virtual ProcessorBehaviour behaviour() const;
                virtual AssemblyType assemblyType() const { return WorkingOriented; }
};


class Instr_call : public Instruction
{
        public:
                Instr_call( const QString & label ) { m_label = label; }
                virtual QString code() const;
                virtual void generateLinksAndStates( Code::iterator current );
                virtual ProcessorBehaviour behaviour() const;
                virtual AssemblyType assemblyType() const { return Other; }
                void makeReturnLinks( Instruction * next );
                
                QString label() const { return m_label; }
                void setLabel( const QString & label ) { m_label = label; }
                
        protected:
                void linkReturns( Instruction * current, Instruction * returnPoint );
                
                QString m_label;
};


//TODO CLRWDT


class Instr_goto : public Instruction
{
        public: